2.5.44

diff -Nru a/Rules.make b/Rules.make
--- a/Rules.make   Fri Oct 18 21:03:04 2002
+++ b/Rules.make   Fri Oct 18 21:03:04 2002
@@ -1,3 +1,6 @@
+
+ifndef no-rules.make
+
 #
 # This file contains rules which are shared between multiple Makefiles.
 #
@@ -87,6 +90,7 @@
 # Subdirectories we need to descend into
 
 subdir-ym   := $(sort $(subdir-y) $(subdir-m))
+subdir-ymn      := $(sort $(subdir-ym) $(subdir-n) $(subdir-))
 
 # export.o is never a composite object, since $(export-objs) has a
 # fixed meaning (== objects which EXPORT_SYMBOL())
@@ -113,6 +117,10 @@
 # Only build module versions for files which are selected to be built
 export-objs := $(filter $(export-objs),$(real-objs-y) $(real-objs-m))
 
+host-progs-single     := $(foreach m,$(host-progs),$(if $($(m)-objs),,$(m)))
+host-progs-multi      := $(foreach m,$(host-progs),$(if $($(m)-objs),$(m)))
+host-progs-multi-objs := $(foreach m,$(host-progs-multi),$($(m)-objs))
+
 # Add subdir path
 
 EXTRA_TARGETS   := $(addprefix $(obj)/,$(EXTRA_TARGETS))
@@ -127,12 +135,19 @@
 multi-objs-y   := $(addprefix $(obj)/,$(multi-objs-y))
 multi-objs-m   := $(addprefix $(obj)/,$(multi-objs-m))
 subdir-ym   := $(addprefix $(obj)/,$(subdir-ym))
+subdir-ymn   := $(addprefix $(obj)/,$(subdir-ymn))
+clean-files   := $(addprefix $(obj)/,$(clean-files))
+host-progs   := $(addprefix $(obj)/,$(host-progs))
+host-progs-single     := $(addprefix $(obj)/,$(host-progs-single))
+host-progs-multi      := $(addprefix $(obj)/,$(host-progs-multi))
+host-progs-multi-objs := $(addprefix $(obj)/,$(host-progs-multi-objs))
 
 # The temporary file to save gcc -MD generated dependencies must not
 # contain a comma
 depfile = $(subst $(comma),_,$(@D)/.$(@F).d)
 
-# We're called for one of three purposes:
+# We're called for one of four purposes:
+# o subdirclean: Delete intermidiate files in the current directory
 # o fastdep: build module version files (.ver) for $(export-objs) in
 #   the current directory
 # o modules_install: install the modules in the current directory
@@ -142,6 +157,19 @@
 #   When targets are given directly (like foo.o), we just build these
 #   targets (That happens when someone does make some/dir/foo.[ois])
 
+ifeq ($(MAKECMDGOALS),subdirclean)
+
+__clean-files := $(wildcard $(EXTRA_TARGETS) $(host-progs) $(clean-files))
+
+subdirclean: $(subdir-ymn)
+ifneq ($(strip $(__clean-files) $(clean-rule)),)
+   rm -f $(__clean-files)
+   $(clean-rule)
+else
+   @:
+endif
+
+else
 ifeq ($(MAKECMDGOALS),fastdep)
 
 # ===========================================================================
@@ -154,14 +182,14 @@
 # ---------------------------------------------------------------------------
 
 fastdep: $(subdir-ym)
-   @/bin/true
+   @:
 
 else
 
 # This sets version suffixes on exported symbols
 # ---------------------------------------------------------------------------
 
-MODVERDIR := include/linux/modules/
+MODVERDIR := include/linux/modules
 
 #
 # Added the SMP separator to stop module accidents between uniprocessor
@@ -246,7 +274,7 @@
 ifneq ($(obj-m),)
    $(call cmd,modules_install)
 else
-   @/bin/true
+   @:
 endif
 
 else # ! modules_install
@@ -255,23 +283,18 @@
 # Building
 # ==========================================================================
 
-# If a Makefile does define neither O_TARGET nor L_TARGET,
-# use a standard O_TARGET named "built-in.o"
-
-ifndef O_TARGET
-ifndef L_TARGET
-O_TARGET := $(obj)/built-in.o
-endif
-endif
+# If a Makefile does not define a L_TARGET, link an object called "built-in.o"
 
 ifdef L_TARGET
 L_TARGET := $(obj)/$(L_TARGET)
+else
+O_TARGET := $(obj)/built-in.o
 endif
 
 first_rule: $(if $(KBUILD_BUILTIN),$(O_TARGET) $(L_TARGET) $(EXTRA_TARGETS)) \
        $(if $(KBUILD_MODULES),$(obj-m)) \
        $(subdir-ym)
-   @/bin/true
+   @:
 
 # Compile C sources (.c)
 # ---------------------------------------------------------------------------
@@ -399,14 +422,6 @@
 # Compile programs on the host
 # ===========================================================================
 
-host-progs-single     := $(foreach m,$(host-progs),$(if $($(m)-objs),,$(m)))
-host-progs-multi      := $(foreach m,$(host-progs),$(if $($(m)-objs),$(m)))
-host-progs-multi-objs := $(foreach m,$(host-progs-multi),$($(m)-objs))
-host-progs         := $(addprefix $(obj)/,$(host-progs))
-host-progs-single     := $(addprefix $(obj)/,$(host-progs-single))
-host-progs-multi      := $(addprefix $(obj)/,$(host-progs-multi))
-host-progs-multi-objs := $(addprefix $(obj)/,$(host-progs-multi-objs))
-
 quiet_cmd_host_cc__c  = HOSTCC  $(echo_target)
 cmd_host_cc__c        = $(HOSTCC) -Wp,-MD,$(depfile) \
          $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) \
@@ -431,6 +446,7 @@
 
 targets += $(host-progs-single) $(host-progs-multi-objs) $(host-progs-multi) 
 
+endif # ! subdirclean
 endif # ! modules_install
 endif # ! fastdep
 
@@ -480,9 +496,9 @@
 # Descending
 # ---------------------------------------------------------------------------
 
-.PHONY: $(subdir-ym)
+.PHONY: $(subdir-ymn)
 
-$(subdir-ym):
+$(subdir-ymn):
    +@$(call descend,$@,$(MAKECMDGOALS))
 
 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
@@ -605,3 +621,5 @@
 descend = echo '$(MAKE) -f $(1)/Makefile $(2)';
 endif
 descend += $(MAKE) -f $(1)/Makefile obj=$(1) $(2)
+
+endif